Scaleable look-up table based memory

Details Scaleable look-up table based memory Scaleable look-up table based memory

2008-06-10

2011-11-22

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Powering

C365S191000, C365S185090, C365S185130

Reexamination Certificate

active

08064280

ABSTRACT:
An integrated circuit having a logic element that includes an array of storage elements convertibly functioning as either a configuration random access memory (CRAM) or a static random access memory (SRAM) is provided. The logic element includes first and second pairs of data paths having dedicated multiplexers. In one embodiment, the first and second pairs of data paths are multiplexed into bit lines of a row of the array. The logic element also includes a data path control block generating control signals for each of the dedicated multiplexers. The control signals determine whether the storage elements function as a CRAM or a SRAM. A method for selectively configuring a memory array between a CRAM mode and SRAM mode are provided.

REFERENCES:
patent: 5790138 (1998-08-01), Hsu
patent: 5996042 (1999-11-01), Pawlowski et al.
patent: 6829183 (2004-12-01), Braceras
patent: 6922370 (2005-07-01), Deng et al.
patent: 6938142 (2005-08-01), Pawlowski

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