Scaleable digital signal processor with parallel architecture

Details Scaleable digital signal processor with parallel architecture Scaleable digital signal processor with parallel architecture

1996-03-11

1999-09-28

Coleman, Eric

39580035, 39520031, G06F 1500

Patent

active

059602090

ABSTRACT:
A distributed architecture parallel processing apparatus, includes a central microprocessor having at least one external interface connected to a similar interface of a neighboring parallel processor. The processors exchange data and control signals through the interfaces to cooperatively share in the execution of a program. An inter-processor status register in each processor maintains the current status of the processors.

REFERENCES:
patent: 4862407 (1989-08-01), Fette et al.
patent: 5187791 (1993-02-01), Baum
patent: 5189598 (1993-02-01), Bolan et al.
patent: 5239654 (1993-08-01), Ing-Simmons
patent: 5488693 (1996-01-01), Houck et al.
Dual-DSP System For Signal and Image Processing --K. Rajan, K.S. Sangunni and J. Ramakrishna --2407 Microprocessors and Microsystems--17 (1993) Nov., No. 9, Jordan Hill,, Oxford, G.B.

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