Scalar interrupt-acknowledgement system that responds to a plura

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395835, 395733, G06F 1300

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active

059130717

ABSTRACT:
A peripheral device and a host device implement a scalar interrupt-acknowledgement system. The peripheral device detects events and increments an unprocessed counter in response to each detected event. The host device processes the events and increments a processed counter in response to each processed event. After a number of events have been processed, the host device transmits the value held by the processed counter to the peripheral device. In response, the peripheral device subtracts the value of the processed counter from the value of the unprocessed counter. The peripheral device asserts an interrupt when events remain to be processed and deasserts the interrupt when all the events have been processed.

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patent: 5315580 (1994-05-01), Phaal
IBM Technical Disclosure Bulletin, "Independent Interrupt Triggering by Timer Signal", vol. 34, No. 10B, Mar. 1992, New York, US, p. 250.
1991 National Semiconductor Data Sheet for the DP83265. Specifically, see p. 2-282.

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