Scalable quantum well device and method for manufacturing...

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

Reexamination Certificate

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Details

C257S194000, C257SE29249, C257SE29250, C257SE29251, C257SE21403

Reexamination Certificate

active

07915608

ABSTRACT:
A quantum well device and a method for manufacturing the same are disclosed. In one aspect, the device includes a quantum well region overlying a substrate, a gate region overlying a portion of the quantum well region, a source and drain region adjacent to the gate region. The quantum well region includes a buffer structure overlying the substrate and including semiconductor material having a first band gap, a channel structure overlying the buffer structure including a semiconductor material having a second band gap, and a barrier layer overlying the channel structure and including an un-doped semiconductor material having a third band gap. The first and third band gap are wider than the second band gap. Each of the source and drain region is self-aligned to the gate region and includes a semiconductor material having a doped region and a fourth band gap wider than the second band gap.

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Cai, et al., “Enhancement-Mode A1GaN/GaN HEMTs with Low On-Resistance and Low Knee-Voltage”IEICE Trans. Electron.(2006) E89-C: 1025-1030.
European Search Report dated Jun. 25, 2009, issued in European Patent Application No. 08168648.7.

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