Scalable neural array processor

Details Scalable neural array processor Scalable neural array processor

1991-08-05

1992-09-08

MacDonald, Allen R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307201, G06F 1518

Patent

active

051465434

ABSTRACT:
The neural computing paradigm is characterized as a dynamic and highly computationally intensive system typically consisting of input weight multiplications, product summation, neural state calculations, and complete connectivity among the neurons. Herein is described neural network architecture for a Scalable Neural Array Process (SNAP) which uses a unique intercommunication scheme within an array structure that provides high performance for completely connected network models such as the Hopfield model. SNAP's packaging and expansion capabilities are addressed, demonstrating SNAP's scalability to larger networks. Each neuron of the processor has an input function element, an activity function element, and a communicating adder. The neuron functions with two state modes, a compute state and a communications state. In response to a compute state, the input function element and said activity function generate a neuron value, and the communicating adder is placed in a compute mode and is responsive to the processor compute state. In a communications state a neuron is responsive to a communications state for operating the communicating adder for communicating a neuron value to an input function element.

REFERENCES:
A General Purpose Architecture for Neural Network Simulations; First IEEE Inter. Conf. Artificial Neural Networks; Duration et al.; 16-18 Oct. 1989; pp. 62-66.
Asynchronous VLSI Neural Networks Using Pulse-Stream Arithmetic; IEEE J. of Solid-State Circuits; vol. 23, No. 3; Jun. 1988; Murray et al.; pp. 688-697.
The VLSI Implementation of Stonn; IJCNN 1990; Wike et al.; pp. 11-593 to II-598.
"Parallel Distributed Processing vol. 1: Foundations", Cambridge, Mass.: MIT Press 1986, pp. 45-76, 319-362, D. E. Rumelhart, J. L. McClelland and the PDP Research Group.
"Neutrons with Graded Response have Collective Computational Properties like those of Two-State Neurons", J. J. Hopfield Proceedings of the Nat'l Acad. of Sci 81, pp. 3088-3092, May 1984.
"A Unified Systolic Architecture for Artificial Neural Networks", S. Y. Kung and J. N. Hwang, Journal of Parallel and Distributed Computing 6, pp. 358-387, 1989.

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