Coded data generation or conversion – Digital code to digital code converters – To or from constant distance codes
Reexamination Certificate
2002-12-16
2004-07-13
Williams, Howard L. (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from constant distance codes
C377S034000, C377S108000, C711S217000, C711S218000
Reexamination Certificate
active
06762701
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates generally to computing devices, and, more particularly to data communication systems comprising such devices. Even more particularly, the present invention relates to integrated circuit design using Gray Code within such communication systems.
BACKGROUND OF THE INVENTION
Communication systems are known to support wireless and wire-lined communications between wireless and/or wire-lined communication devices. Such communication systems range from national and/or international cellular telephone systems to the Internet to point-to-point in-home wireless networks. Each type of communication system is constructed, and hence operates, in accordance with one or more communication standards. For instance, wireless communication systems may operate in accordance with one or more standards including, but not limited to, IEEE 802.11, Bluetooth, advanced mobile phone services (AMPS), digital AMPS, global system for mobile communications (GSM), code division multiple access (CDMA), local multi-point distribution systems (LMDS), multi-channel-multi-point distribution systems (MMDS), and/or variations thereof.
Depending on the type of wireless communication system, a wireless communication device, such as a cellular telephone, two-way radio, personal digital assistant (PDA), personal computer (PC), laptop computer, home entertainment equipment, et cetera, communicates directly or indirectly with other wireless communication devices. For direct communications (also known as point-to-point communications), the participating wireless communication devices tune their receivers and transmitters to the same channel or multiple channels (e.g., one or more of the plurality of radio frequency (RF) carriers of the wireless communication system) and communicate over that channel or channels. For indirect wireless communications, each wireless communication device communicates directly with an associated base station (e.g., for cellular services) and/or an associated access point (e.g., for an in-home or in-building wireless network) via an assigned channel, or channels. To complete a communication connection between the wireless communication devices, the associated base stations and/or associated access points communicate with each other directly, via a system controller, via the public switch telephone network, via the internet, and/or via some other wide area network.
For each wireless communication device to participate in wireless communications, it includes a built-in radio transceiver (i.e., receiver and transmitter) or is coupled to an associated radio transceiver (e.g., a station for in-home and/or in-building wireless communication networks, RF modem, etc.). As is known, the receiver receives RF signals, demodulates the RF carrier frequency from the RF signals to produce baseband signals, and demodulates the baseband signals in accordance with a particular wireless communication standard to recapture the transmitted data. The receiver is coupled to an antenna and includes a low noise amplifier, one or more intermediate frequency stages, a filtering stage, and a data recovery stage. The low noise amplifier receives inbound RF signals via the antenna and amplifies them. The one or more intermediate frequency stages mix the amplified RF signals with one or more local oscillations to convert the amplified RF signals into the baseband signals or intermediate frequency (IF) signals. The filtering stage filters the baseband signals or the IF signals to attenuate unwanted out-of-band signals to produce filtered signals. The data recovery stage recovers raw data from the filtered signals in accordance with the particular wireless communication standard.
As is also known, the transmitter converts data into RF signals by modulating the data to produce baseband signals and mixing the baseband signals with an RF carrier to produce RF signals. The transmitter includes a data modulation stage, one or more intermediate frequency stages, and a power amplifier. The data modulation stage converts the raw data into baseband signals in accordance with a particular wireless communication standard. The one or more intermediate frequency stages mix the baseband signals with one or more local oscillations to produce the RF signals. The power amplifier amplifies the RF signals prior to transmission via the antenna.
Further, data transmissions are serial streams of data, but within a network component (e.g., switch, relay, bridge, gateway, et cetera) the data is processed in parallel. It is a function of the transceiver within each communication device or network component to convert data from a serial to a parallel form, or vice-versa. In general, the transmitter converts parallel data into serial data and sources the serial data onto a communications link. A receiver receives serial data via a communications link and converts it into parallel data. A critical function of the receiver is to accurately sample the received serial data to be able to produce the parallel data.
As communication systems have become more advanced, and as their data capacity has increased, buffering of incoming and outgoing data has become essential. Buffering of data allows a host device to attend to other tasks on a time-multiplexed basis during a communications session. For example, buffering is used to hold multiple communication sessions simultaneously, to perform signal modulation and demodulation and to perform error correction. In addition, buffering can facilitate asynchronous communications, making it unnecessary for communication devices to share a common time base.
Buffering is commonly accomplished using RAM-based FIFOs. A FIFO is a first-in-first-out (FIFO) device in which data is temporarily stored in random-access memory (RAM). When a suitable unit, e.g., a byte, of data is received by the FIFO, the data unit is stored at a FIFO address indicated by a write pointer. Once that data is stored, the write pointer is incremented to the next FIFO address, which is where the next unit of received data will be stored. When a device is ready to read from the FIFO, it reads from a FIFO address indicated by a read pointer. After the data is read, the read pointer is incremented so that the next read is from the next FIFO address. Each pointer is basically a counter that counts data transfers. The counters are modulo in that they wrap to zero when a maximum count is reached.
Counters are used extensively in the design of integrated circuits. For example, conventional binary-code counters can be used as FIFO pointers. Binary counter design is mature enough that, by entering a few specifications (such as the counter range and speed), a computer can provide an optimized counter design. With a binary counter, however, there can be many bit differences in the representation of two adjacent binary numbers. A disadvantage of binary counters, therefore, is that there can be considerable ambiguity when a count is read during a count transition. For example, when a count increments from 011=3 to 100=4, every bit value changes. However, the changes can take place at slightly different times across the bit positions. If the count is used in the same clock domain, this is nota big problem. However, when the count is used in more than one clock domain (e.g., in an asynchronous circuit design), ambiguity can result as to the correct count.
For example, in a RAM-based asynchronous FIFO, the status of the FIFO (i.e., whether a data unit is present in the FIFO) is determined by comparing the read pointer and the write pointer. However, because the read pointer and the write pointer are in different clock domains, direct comparison will not generate a reliable result. For example, when the count increments from 011=3 to 100=4, any of eight possible 3-bit binary values might be read during the transition. This simultaneous transition of a large number of bits can increase the risk of transition errors and can increase the electrical noise generated by the circuitry. Attempt
Broadcom
Markison Timothy W.
Williams Howard L.
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