Static information storage and retrieval – Floating gate – Particular connection
Patent
1996-03-18
1997-09-16
Nelms, David C.
Static information storage and retrieval
Floating gate
Particular connection
36518514, 36518515, 257319, 257320, G11C 1602, H01L 2978
Patent
active
056687575
ABSTRACT:
A scalable flash EEPROM cell has a semiconductor substrate with a drain and a source and a channel therebetween. A select gate is positioned over a portion of the channel and is insulated therefrom. A floating gate has a first portion over the select gate and insulated therefrom, and a second portion over a second portion of the channel and over the source, and is between the select gate and the source. A control gate is over the floating gate and is insulated therefrom. A memory array using this memory cell is also disclosed.
REFERENCES:
patent: 4462090 (1984-07-01), Iizuka
patent: 4531203 (1985-07-01), Masuoka
patent: 4698787 (1987-10-01), Mukherjee et al.
patent: 4979146 (1990-12-01), Yokoyama
patent: 4989053 (1991-01-01), Shelton
patent: 5194925 (1993-03-01), Ajika et al.
patent: 5280446 (1994-01-01), Ma et al.
patent: 5303187 (1994-04-01), Yu
Mai Son
Nelms David C.
Yin Ronald L.
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