Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement
Reexamination Certificate
2000-04-11
2002-05-07
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including particular biasing arrangement
C330S267000
Reexamination Certificate
active
06384687
ABSTRACT:
U.S. BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to transistor control circuit and, in particular, to circuits for limiting saturation of transistors.
2. Description of Related Art
Almost all bipolar feedback amplifiers having an output which must swing close to one or both power supply rails requires the output transistors to operate in the saturation region. When the feedback circuit attempts to require the output to exactly equal the supply voltage, the transistor base drive will be made very large since the output will never reach the supply voltage due to the finite but low saturation voltage of the output transistor. As will be explained, driving certain types of transistors, such as junction isolated PNP transistors, deeply into saturation will cause parasitic current to be generated thereby resulting in, among other things, potential circuit latch-up.
FIG. 1A
depicts one prior art approach to controlling the saturation level of a transistor. PNP transistor QA is shown with an emitter coupled to a positive supply VCC and a collector coupled to an output. The base is connected to receive an input Vin, typically provided by a preceding drive stage. A Schottky diode DS is connected between the base and collector of QA, with the diode anode connected to the collector.
The forward biased junction voltage of a Schottky diode is less than that of a comparable PN junction diode. Thus, as PNP transistor QA approaches saturation, diode DS will become forward bias before the collector-base junction of QA becomes forward. The diode will operate to essentially clamp the collector-base voltage at a voltage sufficiently small to prevent QA from becoming saturated.
One drawback to the use of Schottky diodes as a clamp is that QA is typically not permitted to enter saturation so that the minimum collector-emitter voltage will be much larger that the collector-emitter saturation voltage. Thus, Vout will not be able to swing up as close to VCC as desired. Further, many integrated circuit fabrication processes do not produce Schottky diodes.
Another prior art approach for saturation control is shown in FIG.
1
B. Again, a PNP output transistor QA is used. Another PNP transistor QB is includes with a base connect ed to the base of QA and an emitter connected to the collector of QB. Typically, transistors QA and QB are lateral PNP transistors having a high collector/base breakdown voltage. A buffer circuit A has an input connected to the collector of QB and an output connected to an inverting input of a summing circuit. The non-inverting input to the summing circuit S receives the input Vin.
When transistor QA starts to saturation, transistor QB acts as a saturation detector and proceeds to conduct current. Buffer A act as a current comparator circuit, with current source IS producing the threshold current. Once transistor QB begins to conduct the threshold current, the magnitude of the input Vin is reduced, thereby preventing QA from becoming more deeply saturated. The degree of saturation of transistor QA can be controlled by setting IS to a particular level and by controlling the relative emitter areas of QA and QB.
For large output voltage swings where Vout moves away from supply VCC, the base-emitter voltage of QB will have a large reverse bias. Since the base-emitter breakdown voltage of QB is relatively small, on the order of 5-7 volts, the
FIG. 1B
circuit is limited to those application where the output swing is small.
FIG. 1C
shows a still further prior art saturation control circuit. Transistor QC acts as a saturation detector and is connected to operate in the inverted mode. The base-collector junction of QC, with acts a the base-emitter junction, becomes forward biased when QA starts to saturate thereby causing current to flow out of the emitter of QC. Output transistor QA is typically driven by a transistor QD connected as an emitter follower. Current flow out of transistor QC steals current drive from QD thereby preventing QA from becoming more saturated. The breakdown voltage of the collector-base junction of inverted mode transistor QC is larger than the breakdown voltage of base-emitter junction of transistor QB of
FIG. 1B
so that the output voltage swing of the
FIG. 1C
circuit is not limited as it is in the
FIG. 1B
circuit.
The
FIG. 1C
circuit has several limitations. First, the excess base drive of QA is a function of the reverse-active common-collector current gain and collector resistance of transistor QC. These parameters are difficult to model in a junction-isolated bipolar process, which make the behavior of the
FIG. 1C
circuit difficult to predict in those applications.
Further, the amount of excess base drive of QA is directly proportional to the area ratio of QA to AC and inversely proportional to the PNP reverse common-collector current gain. The current gain is usually much less than unity so that circuit must be design for a low excess base drive and N well current of QA and QB. Thus, it is possible that QC may even have to be bigger than output transistor QA, something undesirable both in terms of die size and capacitance.
Finally, the emitter-base breakdown voltage of sense transistor QC limits the
FIG. 1C
circuit to those where QA is either driven by an emitter follower as shown or a similar non-inverting current amplifier with a DC input very close to VCC. If output transistor QA is driven by a common emitter configured transistor, it is very difficult to use the
FIG. 1C
saturation control approach.
There is a need for a saturation control circuit which addresses all, or most of, the above-noted shortcomings of the prior art. As will become apparent to those skilled in the art upon a reading of the following Detailed Description of the Invention together with the drawing, saturation control circuits in accordance with the present invention meets these and other needs.
SUMMARY OF THE INVENTION
A transistor saturation control circuit for controlling a saturation of a main PNP transistor. In one embodiment, the main PNP transistor is a vertical junction isolated transistor having an associated parasitic NPN transistor with the base of the main PNP transistor forming the emitter of the parasitic transistor and the emitter of the main transistor forming the base of the parasitic transistor, with an N well associated with the main transistor forming a collector of the parasitic transistor.
The control circuit includes current sense circuitry the provides a control output in response to a change in current of the N well. This change in current indicates the saturation level of the main PNP transistor. Base drive circuitry coupled to the base of the main PNP transistor is configured to limit base drive to the PNP transistor in response to the control output. The change in current in the N well indicates the saturation level of the main PNP transistor. As the saturation level is approached or increased, the base drive to the main PNP is reduced thereby preventing the PNP transistor from becoming saturated or more saturated.
REFERENCES:
patent: 5515007 (1996-05-01), Moraveji
patent: 5986509 (1999-11-01), Lohninger
patent: 6052030 (2000-04-01), Garner et al.
patent: 6064268 (2000-05-01), Felps
Girard & Equitz LLP
National Semiconductor Corporation
Nguyen Khanh Van
Pascal Robert
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