Saturation and rounding in multiply-accumulate blocks

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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07467176

ABSTRACT:
Saturation and rounding capabilities are implemented in multiply-accumulate (MAC) blocks to provide rounded and saturated outputs of multipliers and of add-subtract-accumulate circuits implemented using DSP. These features support any suitable format of value representation, including the x.15 format. Circuitry within the multipliers and the add-subtract-accumulate circuits implement the rounding and saturation features of the present invention.

REFERENCES:
patent: 5847978 (1998-12-01), Ogura et al.
patent: 6538470 (2003-03-01), Langhammer et al.
patent: 7047272 (2006-05-01), Giacalone et al.
patent: 2003/0141898 (2003-07-01), Langhammer et al.

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