Satellite receiver tuner chip having reduced digital noise inter

Details Satellite receiver tuner chip having reduced digital noise inter Satellite receiver tuner chip having reduced digital noise inter

1997-06-18

1999-02-09

Chan, Jason

Pulse or digital communications

Receivers

Interference or noise reduction

455 32, 4551501, H04L 2706

Patent

active

058704396

ABSTRACT:
A DBS receiver front end which includes a tuner chip and a demodulator/decoder chip having digital interface signals. The tuner chip is configured to receive the digital signals at a reduced peak-to-peak amplitude to reduce the digital interference noise in the tuner chip. The digital signals may also have a limited slew rate to further reduce the digital interference noise. The tuner chip is configured to convert a receive signal to a baseband signal, and the demodulator/decoder chip is configured to convert the baseband signal to a decoded signal.

REFERENCES:
patent: 4665427 (1987-05-01), Beckley et al.
patent: 4701797 (1987-10-01), Ferreira
patent: 5270816 (1993-12-01), Citta et al.
patent: 5535443 (1996-07-01), Wignot
patent: 5654774 (1997-08-01), Pugel et al.
patent: 5686866 (1997-11-01), Badger

Affiliated with

Also associated with

Rating

Satellite receiver tuner chip having reduced digital noise inter does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Satellite receiver tuner chip having reduced digital noise inter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Satellite receiver tuner chip having reduced digital noise inter will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1956582