Satellite controlled digital clock system

Details Satellite controlled digital clock system Satellite controlled digital clock system

1976-02-13

1977-03-29

Jackmon, E. S.

Communications: radio wave antennas

Antennas

Balanced doublet - centerfed

343225, G04C 1308, H04B 700

Patent

active

040141667

ABSTRACT:
A method and apparatus are provided for maintaining and correcting a time ference in a satellite controlled digital clock system. A time code message including time-of-year information and satellite position information is transmitted in a data stream from a transmitter on earth to a satellite orbiting the earth to be relayed back to receivers located around the world. The data is transmitted at a precise data rate. According to the invention, a local clock oscillator is phase locked with the precise data rate, thereby providing the clock system with time-of-year information by counting the pulses produced by the local oscillator. At the same time, the digital clock system assembles the time code message from the received data stream and compares the message with the time accumulated by counting the pulses produced by the oscillator. After a predetermined number of errors are detected by such comparisons, the clock system resets itself to coincide with the received time code message. If transmission of the time code message is interrupted, the clock continues counting pulses produced by the local oscillator and thereby continues keeping time undisturbed. In a preferred embodiment, the digital clock system is implemented with a firmware programmed micro-computer and the time-of-year and satellite position information is displayed on light emitting diode digital displays.

REFERENCES:
patent: 3472019 (1969-10-01), Webb
patent: 3541552 (1970-11-01), Carlson
patent: 3751900 (1973-08-01), Phillips et al.

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