Sampling phase synchronizing apparatus and bidirectional maximum

Pulse or digital communications – Receivers – Particular pulse demodulator or detector

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375231, H04L 2706

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active

056489919

ABSTRACT:
A sampling phase synchronizing apparatus includes a received signal memory for storing a received signal partially including training codes, a channel response calculator for calculating the time response of a channel (to be referred to as a channel response hereinafter) unique to the reception time using a partial sequence of the training codes included in the received signal stored in the received signal memory, a power ratio calculator for calculating the ratio between the power of the channel response calculated by the channel response calculator, and the power of a portion of the channel response, a power ratio memory for storing the power ratio calculated by the power ratio calculator, and a sampling phase deciding section for determining a sampling phase using the power ratio stored in the power ratio memory. The apparatus samples the received signal with reference to the sampling phase determined by the sampling phase deciding section.

REFERENCES:
patent: 5182749 (1993-01-01), Kazecki et al.
patent: 5263026 (1993-11-01), Parr et al.
patent: 5274670 (1993-12-01), Serizawa et al.
IEEE, Globecom, pp. 1458-1462, Yow-Jong Liu, "Bi-Directional Equalization Technique for TDMA Communication Systems Over Land Mobile Radio Channels".
IEEE, VTC, vol. 2, pp. 744-747, 1992, R. D. Koilpillai, et al., "Low Complexity Equalizers for U.S. Digital Cellular System".

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