Sampling level converter circuit, 2-phase and multiphase...

Details Sampling level converter circuit, 2-phase and multiphase... Sampling level converter circuit, 2-phase and multiphase...

2006-02-28

2006-02-28

Chang, Kent (Department: 2675)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S099000

Reexamination Certificate

active

07006068

ABSTRACT:
A sampling level converter circuit having a fewer number of terminals and reduced power consumption, as well as an expanding circuit having such a sampling level converter circuit. The sampling level converter circuit includes first to third MOS transistors connected serially between a higher-potential power-supply and a lower-potential power-supply, a first capacitor connected to a connection node of the first and second MOS transistors, a fourth MOS transistor connected between an input terminal and the gate terminal of the third MOS transistor and a second capacitor connected to the gate of the third MOS transistor. A sampling pulse signal is supplied to the gates of the first and second MOS transistors, and a signal obtained by inverting this sampling pulse signal is supplied to the gate of the fourth MOS transistor.

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Yoshiharu Nakajima et al., “TA 11.5—A 3.8inch QVGA Reflective Color LCD with Integrated 3b DAC Driver”,ISSCC 2000, Section 11, 2000 IEEE International Solid-State Circuits Conference, 2000, pp. 188-189.

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