Sampling/holding method and circuit

Details Sampling/holding method and circuit Sampling/holding method and circuit

2005-08-30

2005-08-30

Nguyen, John B (Department: 2819)

Coded data generation or conversion

Sample and hold

C341S141000, C341S159000

Reexamination Certificate

active

06937174

ABSTRACT:
The objective is to provide a sampling/holding circuit that can operate at high speed and low power consumption. The sampling/holding circuit has multiple sampling units2-1˜k. Each sampling unit has input terminals1-1˜k and output terminals3-1˜k. The values received at the input terminals are sampled, and the sample values are accumulated. Also, the accumulated sample values are generated at output terminals3-1˜k. One holding unit6has an input terminal5and an output terminal7, which are shared by the multiple sampling units. By multiplexing the outputs of the multiple sampling units, multiplexing unit4connects any output to the input of holding unit6. Holding unit6holds the sample value and generates it at output7.

REFERENCES:
patent: 5986510 (1999-11-01), Graeve et al.
patent: 6166675 (2000-12-01), Bright
patent: 6169751 (2001-01-01), Shirakata et al.
patent: 2002/0106038 (2002-08-01), Lee et al.

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