Coded data generation or conversion – Sample and hold – Having variable sampling rate
Reexamination Certificate
2000-03-23
2001-06-19
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Sample and hold
Having variable sampling rate
C331S016000, C331S074000, C708S103000
Reexamination Certificate
active
06249235
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a conversion apparatus for a sampling frequency in digital signal processing, and more particularly to a sampling frequency conversion apparatus and a fractional frequency dividing apparatus for sampling frequency conversion by which the ratio between frequencies before and after frequency conversion can be set to a non-integer.
2. Description of the Related Art
A sampling frequency conversion apparatus which samples a signal obtained by sampling an original signal with a different sampling frequency again is conventionally known and disclosed, for example, in Japanese Patent Laid-Open Application No. Heisei 6-252749.
FIG. 4
shows a conventional sampling frequency conversion apparatus of the type mentioned above. Referring to
FIG. 4
, the sampling frequency conversion apparatus shown can provide a plurality of combinations between the sampling frequency of input data and the sampling frequency of output data. In order to generate a clock signal for sampling, a PLL circuit composed of a phase comparator
41
, a voltage-controlled oscillator
42
and a frequency divider
43
is used.
The sampling frequency conversion apparatus adopts such a construction that a signal obtained by sampling an original signal with a clock signal of a predetermined clock frequency is inputted as input data to an oversampling circuit
44
so that it is oversampled with a clock signal of another frequency higher than the sampling frequency.
The clock signal for oversampling the input data is inputted to the phase comparator
41
while an output of the voltage-controlled oscillator
42
is inputted to the phase comparator
41
after it is divided by the frequency divider
43
so that the phases of the clock signal and the divided signal are compared with each other by the comparator
41
to produce an error signal. Then, the voltage-controlled oscillator
42
is controlled with the error signal so that a clock signal corresponding to, but having a higher frequency than, the input clock signal is outputted as the clock signal for oversampling from the voltage-controlled oscillator
42
to the oversampling circuit
44
.
The sampling frequency conversion apparatus described above has a restriction in that, since the original clock signal and the output of the voltage-controlled oscillator
42
are used as clock signals for sampling, when performing conversion of the sampling frequency utilizing the two clock signals, the ratio between frequencies before and after the frequency conversion must be an integer.
Therefore, with the sampling frequency conversion apparatus described above, where the frequency of the voltage-controlled oscillator side is determined from a demand from a system, there is a limitation in frequency of an oscillator serving as a source oscillator which oscillates the original or reference clock signal. Therefore, it is difficult to use another oscillator, which is used in the system, commonly as the source oscillator.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a sampling frequency conversion apparatus and a fractional dividing apparatus for sampling frequency conversion by which, when a sampling frequency is to be converted into another frequency, another oscillator used in a system can be used commonly as a source oscillator.
In order to attain the object described above, according to an aspect of the present invention, there is provided a sampling frequency conversion apparatus, comprising an oscillator for generating a clock signal for sampling, a fractional frequency divider for dividing the output clock signal of the oscillator at a non-integer frequency ratio, a first sampling circuit for sampling a signal inputted thereto with the output clock signal of the oscillator, and a second sampling circuit for sampling an output of the first sampling circuit with an output clock signal of the fractional frequency divider.
The sampling frequency conversion apparatus may be constructed such that an A/D converter is used for the first sampling circuit, and a digital filter is interposed between the A/D converter and the second sampling circuit.
According to another aspect of the present invention, there is provided a sampling frequency conversion apparatus, comprising an oscillator for generating a clock signal for sampling, a fractional frequency divider for dividing the output clock signal of the oscillator at a non-integer frequency ratio, a first sampling circuit for sampling a signal inputted thereto with an output clock signal of the fractional frequency divider, and a second sampling circuit for sampling an output of the first sampling circuit with the output clock signal of the oscillator.
The sampling frequency conversion circuit may be constructed such that a waveform shaping processing circuit is used for the first sampling circuit, the sampling frequency conversion apparatus further comprising a digital filter for filtering an output of the second sampling circuit and a D/A converter for converting an output of the digital filter into an analog signal.
With both of the sampling frequency conversion device described above, as a clock signal for sampling, a clock signal of a high frequency is divided to produce another clock signal of a low frequency, and the dividing ratio of a divider to be used for such division is periodically varied to a value to effect division of a frequency ratio having a fraction when averaged over a period of time. Consequently, since the clock signal of the high frequency is divided at a fractional dividing ratio to produce the clock signal of the low frequency and conversion of the sampling frequency is performed with the clock signals, when the sampling frequency is to be converted, the high frequency can be selected irrespective of the low frequency, and another oscillator which is used in the system can be used commonly as the source oscillator.
Further, as the frequency for the clock signal for sampling, either one of the high frequency and the low frequency can be selected arbitrarily, and the two clock signals are synchronized fully with each other. Therefore, although the frequencies before and after conversion of the sampling frequency do not present an integer ratio, the two signals are synchronized with each other.
According to a further aspect of the present invention, there is provided a fractional frequency divider for sampling frequency conversion, comprising a frequency divider for dividing a clock signal, a first selector for selectively loading N or N+1 as a value for determination of a dividing ratio to the frequency divider, an adder for receiving a fixed integer value L as a first input in response to an output of the frequency divider and adding the first input and a second input, a subtractor for subtracting another fixed integer value M larger than the fixed integer value L from an output of the adder, a second selector for selectively outputting the output of the adder or an output of the subtractor, a latch circuit for latching an output of the second selector in response to the clock signal divided by the frequency divider and supplying the latched output as the second input to the adder, and a comparator for controlling the first and second selectors depending upon whether or not the output of the subtractor is equal to or higher than zero or lower than zero.
The above and other objects, features and advantages of the present invention will become apparent from the following description and the appended claims, taken in conjunction with the accompanying drawings in which like parts or elements are denoted by like reference characters.
REFERENCES:
patent: 4656649 (1987-04-01), Takahashi
patent: 5485152 (1996-01-01), Wilson et al.
patent: 5513209 (1996-04-01), Holm
patent: 5559513 (1996-09-01), Rothermel et al.
patent: 0512619 (1992-11-01), None
patent: 06252749 (1994-09-01), None
European Search Report issued Aug. 25, 2000, in a related application (in English).
NEC Corporation
Ostrolenk Faber Gerb & Soffen, LLP
Wamsley Patrick
LandOfFree
Sampling frequency conversion apparatus and fractional... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Sampling frequency conversion apparatus and fractional..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Sampling frequency conversion apparatus and fractional... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2501976