Coded data generation or conversion – Sample and hold
Reexamination Certificate
2001-01-08
2002-10-29
Young, Brian (Department: 1745)
Coded data generation or conversion
Sample and hold
C341S123000, C341S111000
Reexamination Certificate
active
06473014
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a sample switch, generally, and more particularly, to a sampling circuit having an intrinsic filter.
BACKGROUND OF THE INVENTION
A commercial drive exists for signal processing digitized signals to improve accuracy, reduce power consumption, and lower overall costs. One area employing digital signal processing to a great advantage is wireless communication systems, such as, for example, cellular and cordless telephones. A digital signal processing scheme, however, necessitates the conversion of continuous analog signals into a digital format. This step is typically realized by an analog-to-digital converter (“ADC”). ADCs convert continuous analog signals into discrete digital data by performing a series of functional steps. These processes include sampling, holding, quantizing and encoding.
To formulate an ideal digital representation of an analog signal, several considerations first proposed by Nyquist need to be adhered to in the sampling step. One such condition is that the continuous analog signal to be digitized must be band limited. Secondly, the frequency of the sampling in the digitization process need be at least twice the bandwidth of the analog signal.
However, if either or both of the Nyquist considerations are not followed, a distinctive error may be realized in the sampled signal. This error, also referred to as aliasing, mixes various frequency components to create distortion. Various solutions are known to minimize the impact of the issue of aliasing errors. One known approach employs filters prior to sampling the analog signal for removing the essential signal energy outside the required band limited spectrum.
While providing relief for the aliasing errors, pre-sampling filters require tradeoffs. First, pre-sampling filters are engineering intensive in terms of design, taking into consideration the application of the ADC. Moreover, pre-sampling filters are typically realized by discrete passive componentry, such as a surface acoustic wave (“SAW”) device, which are relatively expensive.
As such, there is a need for a sampling scheme in an ADC which reduces aliasing errors without creating engineering intensive and application specific designs. There also exists a demand for a sampling scheme in an ADC which reduces aliasing errors at a cost savings over the known approaches.
SUMMARY OF THE INVENTION
One advantage of the present invention is to provide a sampling device which reduces aliasing errors without creating engineering intensive and application specific designs.
Another advantage of the present invention is to provide a sampling device which reduces aliasing errors at minimal additional cost over the known approaches.
In one embodiment of the present invention, a sampling device is disclosed having intrinsic filtering properties. The sampling device samples a continuous analog input signal according to a sampling signal. In another embodiment of the present invention, the input signal to be sampled comprises an intermediate frequency (“IF”) band. The sampling device comprises a first sampling switch for sampling the input signal, in response to a sampling signal, to create a first set of samples. Furthermore, the sampling device comprises a time delay device for time delaying the first set of samples. The sampling device also comprises a phase shift device for phase shifting the input signal. The phase delayed input signal is then fed into a second sampling switch for sampling in response to the sampling signal to create a second set of samples. Further, a summer is incorporated to sum the first set of samples with the second set of samples to create the output samples.
In a further embodiment of present invention, the time delay device is realized by an analog memory element or device for time delaying each sample of the first set of samples for one sampling period of the sampling signal. In an embodiment of the present invention, the input signal is phased delayed by approximately &pgr;/2 radians.
In another embodiment of the present invention, the input signal is fed into a mixer having a first and a second mixed output. The second mixed output is thereafter phase shifted to be out of phase with the first mixed output by a predetermined amount. In a further embodiment, this predetermined amount is approximately &pgr;/2 radians.
In yet another embodiment of the present invention, the first and second sampling switches are formed utilizing at least one MOS transistor. With respect to the first sampling switch, the gate of the MOS transistor receives the sampling signal, the source receives the continuous analog input signal, and the drain creates samples that are fed into the time delay device. Similarly, the gate of the second sampling switch receives the sampling signal, the source receives the phased delayed input signal, while the drain creates the second set of samples.
In another embodiment of the present invention, an analog to digital converter is disclosed which employs a sampling device for sampling the analog input signal and creating output samples. The sampling device comprises a number of branches, j, where j is a whole number greater than one. Each branch comprises a phase shift device having a phase shift coefficient for phase shifting the input signal. The phase delay coefficient comprises the difference between j and k, where k is a whole number between one and j. Further, each branch comprises a sampling switch for sampling the phase shifted input signal in response to a sampling signal to create a set of samples. A time delay device is incorporated on each branch for time delaying the set of samples of the respective branch. Each time delay device also has a time delay coefficient corresponding with the terms of a Z transform. Moreover, each branch comprises an amplifier for amplifying the time delayed set of samples. Each amplifier has a gain coefficient corresponding with the terms of a Z transform. The sampling device also comprises a summer for summing the amplified time delayed set of samples from each branch to generate output samples. The analog to digital converter further includes a holding device for holding the output samples, a quantizing device for quantizing the output samples, and an encoding device for encoding the quantized output samples.
In another embodiment of the present invention, an electronic device is disclosed for receiving an input radio frequency (“RF”) signal, and for generating a digital signal. The electronic device comprises an RF filter for filtering the input RF signal, an amplifier for amplifying the filtered input RF signal, an RF mixer having an RF oscillator for mixing the amplified filtered input RF signal, an intermediate frequency (“IF”) filter for filtering the RF mixed, amplified and filtered input RF signal, and an analog to digital converter for converting the filtered, RF mixed, amplified and filtered input RF signal into a digital signal. The analog to digital converter comprises a sampling device for sampling the filtered, RF mixed, amplified and filtered input RF signal and creating output samples. The sampling device comprises a first sampling switch for sampling the filtered, RF mixed, amplified and filtered input RF signal in response to a sampling signal to create a first set of samples. The sampling device also comprises a time delay device for time delaying the first set of samples. Further, the sampling device comprises a phase shift device for phase shifting the filtered, RF mixed, amplified and filtered input RF signal, and a second sampling switch for sampling the phase shifted, filtered, RF mixed, amplified and filtered input RF signal in response to the sampling signal to create a second set of samples. The sampling device also comprises a summer for summing the first and second set of samples to generate the output samples. Moreover, the analog to digital converter comprises a holding device for holding the output samples, a quantizing device for quantizing the output samples, and an encoding device for encoding th
Banu Mihai
Samori Carlo
Agere Systems Guardian Corp.
Ligon John
Nguyen John B
Young Brian
LandOfFree
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