Sampling comparator circuit for processing a differential input

Details Sampling comparator circuit for processing a differential input Sampling comparator circuit for processing a differential input

1982-12-23

1985-09-17

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307493, 307497, 307291, 328206, 330112, 330260, H03K 3286, G11C 800

Patent

active

045423083

ABSTRACT:
An MOS sampling comparator circuit including a differential amplifier for producing first and second amplified signals, a first positive feedback circuit for further amplifying the first amplified signal, a second positive feedback circuit for further amplifying the second amplified signal, a strobed latch, having a positive feedback circuit, for further amplifying and storing the signals from the first and second positive feedback circuits, and a circuit for outputting complementary logic signals in response to the latched signals. By providing the first and second positive feedback circuits, small analog differential voltage input signals to the differential amplifier are further amplified and coupled without delay to the latch, resulting in an accurate conversion of the analog input signals to logic signals at high speed.

REFERENCES:
patent: 4041333 (1977-08-01), Porat
patent: 4146802 (1979-03-01), Moench
patent: 4150311 (1979-04-01), Matsuda et al.

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