Sampling an analog signal voltage using fill and spill input in

Details Sampling an analog signal voltage using fill and spill input in Sampling an analog signal voltage using fill and spill input in

1991-04-19

1992-09-08

Munson, Gene M.

Electrical pulse counters, pulse dividers, or shift registers: c

Charge transfer device

Particular input or output means

357 24, G11C 1928, H01L 2978

Patent

active

051464802

ABSTRACT:
A charge coupled device for sampling an analog signal voltage. If charge is inputted to a charge coupled device by the so-called phase-referred input method, a minority charge carrier source region (10) in a semiconductor body (1) is clocked in phase with a charge transfer gate (6) so that a metering potential well formed under a metering electrode (4) is alternately filled via a d.c. gate (5) with carriers to a predetermined level and then surplus carriers are drained back via the d.c. gate and the remainder exit via the transfer gate. This mechanism tends to degrade at high frequencies and, in order to improve the high frequency performance, a very short further gate (20) is provided between the d.c. gate and the metering well. This further gate is clocked in antiphase to the source region (10) and the transfer gate (6) so that it creates a rising potential barrier when the surplus carriers are being drained back, thereby isolating the metering well from the source (10) and the d.c. gate comparatively early in the complete draining process than would otherwise occur.

REFERENCES:
patent: 3986198 (1976-10-01), Kosonocky
patent: 4112456 (1978-09-01), Lampe et al.
patent: 4178519 (1979-12-01), Engeler et al.
patent: 4606060 (1986-08-01), Klar et al.
patent: 4890307 (1989-12-01), Imai et al.

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