Sampler hold circuit for CCD image-sensor signal

Details Sampler hold circuit for CCD image-sensor signal Sampler hold circuit for CCD image-sensor signal

1991-10-09

1993-06-01

Goldstein, Herbert

Facsimile and static presentation processing

Facsimile

Recording apparatus

35821311, H04N 5335

Patent

active

052165094

ABSTRACT:
A sample hold circuit has a first sample hold circuit and a second sample hold circuit, which are of the same in circuit configuration, each having a clamping circuit at an input stage of the sample hold circuit and a sample-holding circuit at the next stage, and the first sample hold circuit and the second sample hold circuit receiving commonly at least a clamping reference voltage, a clamping control signal for the clamping circuit and a sampling control signal for the sample-holding circuit. An output of a CCD image sensor is inputted to only one of the first sample hold circuit and the second sample hold circuit, whereby the output signals from the first sample hold circuit and the second sample hold circuit are outputted in a differential mode. It is possible to reduce low frequency 1/f noise and reset pulse noise in the image signal produced by the CCD image sensor by inputting the output signals from the first and second sample hold circuits to a differential circuit.

REFERENCES:
patent: 4283742 (1981-08-01), Izumita et al.
patent: 4651213 (1987-03-01), Takimoto
patent: 4809074 (1989-02-01), Imaide et al.
patent: 4816917 (1989-03-01), Yamamoto et al.
patent: 4918730 (1990-04-01), Schulze
patent: 5010408 (1991-04-01), Toohey

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