Sampled phase locked loop being locked with support from another

Details Sampled phase locked loop being locked with support from another Sampled phase locked loop being locked with support from another

1996-10-04

1998-04-14

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural a.f.s. for a single oscillator

331 14, 331 17, 331 25, H03L 7087, H03L 7091, H03L 723

Patent

active

057397279

ABSTRACT:
A sampled phase locked loop is phase-locked with support from a conventional phase locked loop (PLL). The support value from the PLL is locked with the aid of a sample and hold circuit. The locked support value is summed together with the control signal from the sampled loop in order to control a controlled oscillator which can suitably be a voltage-controlled oscillator. Accuracy of the support values depend on the PLL's resolution. The sampled loop is coupled in without any signal being built up in the sampled loop's loop filter.

REFERENCES:
patent: 3660781 (1972-05-01), Tewksbury et al.
patent: 4459560 (1984-07-01), Kurihara
patent: 4864252 (1989-09-01), Heck
patent: 5424687 (1995-06-01), Fukuda
Japanese Patent Abstract, vol. 12, No. 225, E-626, JP, A, 63-20918 (NEC Corp), 28 Jan. 1988 (Jan. 28, 1988).

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