Sample rate converter circuit for image data

Details Sample rate converter circuit for image data Sample rate converter circuit for image data

1991-12-23

1993-12-28

Coles, Sr., Edward L.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358448, 358138, H04N 140, H04N 712

Patent

active

052744698

ABSTRACT:
The present invention is a sample rate converter in which a weighted filtering operation is performed. This operation stores a pixel stream in a random access memory (RAM) 30. During conversion pointers stored in counter 38 and register 40 are used to select the pixels from the RAM which are then multiplied by filter weights and accumulated. A counter 44 and mapping unit 46 select the weight being multiplied. The multiplication is performed by a lookup table read only memory (ROM) 32 that stores the results of the pixel-weight multiplication for all combinations of pixels and weights for each sample rate. An accumulator 33 stores the results of the multiplication until all multiplications have occurred at which point the filtered pixel is output. The output of the lookup table 32 is controlled by the pixel value, the coefficient selected and the table or map selected. The lookup table stores symmetric weights for as many conversion rates as desired. The mapping unit 46 maps a sequential coefficient count to a coefficient identifier which is non-sequential and symmetric allowing the size of ROM 32 to minimized and the number of address lines provided to the ROM 32 to be minimized.

REFERENCES:
patent: 4106053 (1978-08-01), Maxemchuk
patent: 4536745 (1985-08-01), Yamaguchi et al.
patent: 4891713 (1990-01-01), Mizukoshi et al.
patent: 5101369 (1992-03-01), Torii et al.
patent: 5119093 (1992-06-01), Vogt et al.
patent: 5159339 (1992-10-01), Fujita
Storage And Retrieval of Digitized Photographic Images, Eastman Kodak, U.S. Ser. No. 809,365.

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