Sample-hold phase detector

Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock

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Details

307232, 328133, 328151, 358158, G11C 2702

Patent

active

042163960

ABSTRACT:
A differential sample-and-hold circuit includes first and second emitter-coupled transistors the bases of which are coupled to the signal source to be sampled. A gated circuit source coupled to the joined emitters supplies operating current in the sampling mode and supplies no current in the holding mode. First and second rectifiers each serially coupled with a resistor are coupled between a reference voltage and the collectors of the first and second transistors, respectively. A hold capacitor is coupled between the collectors of the transistors.

REFERENCES:
patent: 3641258 (1972-02-01), Steckler
patent: 3671783 (1972-06-01), Hampel et al.
patent: 3870900 (1975-03-01), Malaviya
patent: 3961360 (1976-06-01), Sato et al.

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