Sample/hold free most significant bit comparator using bisection

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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Details

341156, H03M 142

Patent

active

056316500

ABSTRACT:
This invention provides an analog to digital converter using bisection comparators to determine the Most Significant Bits of the input voltage. The bisection comparator is comprised of three inverting amplifiers and does not use an auto zero phase, which reduces the power dissipation in the bisection comparator significantly. The bisection comparator does not use a sample and hold circuit and no capacitors are required, which significantly reduces the size of the integrated circuit chip. The analog to digital converter uses a number of bisection comparators to determine the Most Significant Bits of the input voltage and fine analog to digital converters to determine the Least Significant Bits of the input voltage. The outputs of the bisection comparators are used to set the switches of the fine analog to digital converters.

REFERENCES:
patent: 4733217 (1988-03-01), Dingwall
patent: 4903028 (1990-02-01), Fukushima
patent: 5298814 (1994-03-01), Caruso
patent: 5399919 (1995-03-01), Mair

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