Coded data generation or conversion – Sample and hold
Reexamination Certificate
2011-06-28
2011-06-28
Williams, Howard (Department: 2819)
Coded data generation or conversion
Sample and hold
C341S155000, C327S091000
Reexamination Certificate
active
07969336
ABSTRACT:
A sample-hold circuit includes a voltage-current converter, having a first input terminal pair to which an input differential signal is input and a first output terminal pair which outputs current according to the voltage of the input differential signal, a spreading switch having a switch group which switches the first output terminal pair to inverting or non-inverting states, and an integrator having a second input terminal pair coupled to the first output terminal pair via the spreading switch, an output amplifier which outputs to a second output terminal pair an output differential signal amplified according to the differential signal at the second input terminal pair, a capacitor pair which is provided respectively between the second input terminal pair and second output terminal pair, and which is charged or discharged by current input to the second input terminal pair, and a reset circuit which resets charge states of the capacitor pair.
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Jamal, S.M.,et al. “A 10-b 120-Msample/s Time-Interleaved Analog-to-Digital Converter with Digital Background Calibration,” IEEE Journal of Solid-State Circuits, Dec. 2002, pp. 1618-1627, vol. 37, Issue. 12, Fig. 10.
Van Der Ploeg, Hendrik , et al. “A 2.5-V 12-b 54-Msample/s 0.25-μm CMOS ADC in 1-mm2With Mixed-Signal Chopping and Calibration,” IEEE Journal of Solid-State Circuits, Dec. 2001, pp. 1859-1867, vol. 36, Issue. 12.
Arent & Fox LLP
Fujitsu Limited
Williams Howard
LandOfFree
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