Sample hold circuit for LCD driver

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

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345100, G09G 300

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active

058749349

ABSTRACT:
In order to provide a sample hold circuit used in LCD driver circuit or dividing an analog signal to parallel source driving signals in desired order with fewer numbers of elements and lower current consumption, a sample hold circuit of the invention comprises two emitter coupling logic circuit (2 and 3), each having the same number of transistors (Q2-1 to Q2-n and Q3-1 to Q3-n) with their bases controlled with outputs of a shift register (6). By connecting collectors of transistors (Q2-1 to Q2-n and Q3-1 to Q3-n) of each emitter coupling logic circuit (2 or 3) to current mirrors (4-1 to 4-n) in inverse order with each other, sample hold units (5-1 to 5-n) output sample hold signals supplied with outputs of the current mirrors (4-1 to 4-n) forward scanning or backward scanning according to the emitter coupling logic circuit (1 or 2) activated.

REFERENCES:
patent: 5369417 (1994-11-01), Tanaka
patent: 5602561 (1997-02-01), Kawaguchi et al.
patent: 5680149 (1997-10-01), Koyama et al.
patent: 5745093 (1998-04-01), Tsuzuki et al.
K. Nakajima et al., "Full-color Liquid-Crystal Display Products", NEC Technical Journal, vol. 46, No. 10, 1993, pp. 12-16.

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