Sample hold circuit, buffer circuit and sample hold apparatus us

Details Sample hold circuit, buffer circuit and sample hold apparatus us Sample hold circuit, buffer circuit and sample hold apparatus us

1992-05-22

1994-08-23

Callahan, Timothy P.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307353, 307494, 328151, H03K 5159

Patent

active

053410378

ABSTRACT:
Positive and negative output ends of a differential circuit in a sample hold circuit are connected to capacitors through switch circuits. Further, collectors of two input transistors of a buffer circuit connected to the sample hold circuit are driven by a collector driving differential circuit, so as to make the collector.multidot.base voltages of two input transistors same to each other. Consequently, a stable sample hold circuit having an arbitrary gain can be provided. In addition, drifts of outputs from two capacitors in the sample hold circuit can be made equal to each other by the buffer circuit.

REFERENCES:
patent: 4370572 (1983-01-01), Cosand et al.
patent: 4873457 (1989-10-01), Sanielevici
patent: 5017924 (1991-05-01), Guiberteau et al.
IEEE International Solid-State Circuit Conference Digest of Technical Papers, by Bernard Zojer et al., Feb. 15, 1990, pp. 164-165 and 290.
"Analysis and Design of Analog Integrated Circuit 2nd Edition", John Wiley & Sons, pp. 10-17.

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