Sample hold circuit and method for sampling and holding signal

Details Sample hold circuit and method for sampling and holding signal Sample hold circuit and method for sampling and holding signal

2009-12-16

2011-11-08

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S096000

Reexamination Certificate

active

08054105

ABSTRACT:
A sample hold circuit and a method for sampling and holding a signal are provided. The sample hold circuit includes a sample unit, a direct current (DC) voltage elimination unit, and a hold unit. When the sample hold circuit is in a first state, the sample unit samples an input signal, and the DC voltage elimination unit lowers a predetermined percentage of the DC voltage in the input signal sampled by the sample unit. When the sample hold circuit is in a second state, the DC voltage elimination unit eliminates the residual percentage of the DC voltage, and the hold unit outputs the alternating current (AC) signal in the input signal sampled by the sample unit.

REFERENCES:
patent: 5698999 (1997-12-01), Etoh et al.
patent: 6184726 (2001-02-01), Haeberli et al.

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