Sample hold circuit and image display device using the same

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S088000, C345S093000, C345S098000, C345S100000

Reexamination Certificate

active

07573451

ABSTRACT:
A sample hold circuit includes a first switch connected between a data line and a first node, a second switch connected between first node and a second node, a capacitor connected between the second node and a line of a common potential, and a drive circuit applying a potential equal to that of the second node to the first node and one of the electrodes of the liquid crystal cell. The first and second switches are turned on when a scanning line is at an “H” level.

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U. Tietze, Ch. Schenk, Halbleiter-Schaltungstechnik, 7th revised edition, Chapter 5, Feldeffekttransistoren, pp. 83 to 101, Springer-Verlag.
German Office Action dated Apr. 11, 2007.

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