Sample/hold circuit, and analog-to-digital converter

Details Sample/hold circuit, and analog-to-digital converter Sample/hold circuit, and analog-to-digital converter

2011-01-11

2011-01-11

Nguyen, Linh V (Department: 2819)

Coded data generation or conversion

Sample and hold

C341S155000, C341S161000, C341S172000

Reexamination Certificate

active

07868797

ABSTRACT:
There is disclosed a sample-and-hold circuit. An operational amplifier includes an inverting input terminal, a non-inverting input terminal, an inverting output terminal, and a non-inverting output terminal. First and second groups of capacitors are operated in first to third modes periodically. Positive and negative input signals are input to charge an electric charge in the first mode, electric charge are held while positive and negative output signals are output from the operational amplifier by connecting between the inverting input terminal and the non-inverting output terminal and by connecting between the non-inverting input terminal and the inverting output terminal in the second mode, and electric charge are discharged in the third mode. Second group of capacitors shifts to the third mode when first group of capacitors is in the first or second mode, and shift to the first or second mode when first group of capacitors is in the third mode.

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