Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock
Patent
1989-09-26
1990-10-09
Zazworsky, John
Electrical transmission or interconnection systems
Personnel safety or limit control features
Interlock
307494, 328151, G11C 2702
Patent
active
049623257
ABSTRACT:
An auto-zeroing sample-hold amplifier capable of tracking an input voltage and, when designated, sampling and accurately holding an input voltage with no gain or offset errors includes input and output buffers with complementary, equal-magnitude offsets for minimizing offset voltage errors. An input voltage is sampled across a primary hold capacitor as well as a secondary hold capacitor [at the amplifier output to] in a sample mode. In a hold mode, the capacitors, in conjunction with the buffers and a transconductance amplifier, form a negative feedback loop around the transconductance amplifier to hold the sampled voltage and reduced voltage excursions at the output of the sample-hold amplifier. A special cancellation switch and capacitor are included for differentially cancelling voltage errors caused by switch charge feed-through onto the primary hold capacitor.
REFERENCES:
patent: 4570080 (1986-02-01), Swanson
patent: 4604584 (1986-08-01), Kelley
patent: 4672239 (1987-06-01), Thommen
patent: 4779012 (1988-10-01), Moscovici
P. Henry, JFET-Input Amps are Unrivaled for Speed and Accuracy; Electrical Design News, vol. 32, No. 10, pp. 161-169, May 14, 1987.
L. Kunsagi et al., Buffer-Based Switched-Capacitor Gain Stages, Electronics Letters, vol. 24, No. 5, pp. 254-255, Mar. 3, 1988.
Martin et al., "A Differential Switched-Capacitor Amplifier", IEEE Journal of Solid-State Circuit, SC-22, no. 1, Feb. 1987, pp. 104-106.
Gasperik, "An Autozeroing Sample & Hold IC," 1980, IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 132-133, 2/1980.
Miller Gerald
O'Connor Christopher
Analog Devices Inc.
Zazworsky John
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