Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal
Reexamination Certificate
2006-12-19
2006-12-19
Kumar, Pankaj (Department: 2611)
Pulse or digital communications
Synchronizers
Frequency or phase control using synchronizing signal
C375S354000, C375S365000
Reexamination Certificate
active
07151812
ABSTRACT:
A sample clock extracting circuit comprises including a number-of-change point memory, a number-of-change point updating circuit and an output clock phase determining circuit. The number-of-change point memory stores a number-of-change-point information set every N types of clock phases each having a frequency equivalent to N times a symbol transmission rate of an input baseband signal. The number-of-change point updating circuit updates the number-of-change point information stored in the number-of-change point memory about a clock phase related to timing thereof when a rising change point or a falling change point occurs in the baseband signal. The output clock phase determining circuit determines a clock phase directly or indirectly indicative of a sample clock phase for the baseband signal based on the number-of-change-point information stored in the number-of-change point memory.
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Ejaz Naheed
Kumar Pankaj
Oki Electric Industry Co. Ltd.
VolentineFrancos&Whitt,PLLC
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