Sample-and-hold with no-delay reset

Details Sample-and-hold with no-delay reset Sample-and-hold with no-delay reset

2005-11-15

2005-11-15

Nu Ton, My-Trang (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S093000

Reexamination Certificate

active

06965258

ABSTRACT:
An integrated circuit having a sample-and-hold device is provided, which can be operated in successive cycles which each include a sample phase and a hold phase. During a sample phase a first storage device is charged to a voltage value proportional to an analog input signal, which voltage value is provided for a further circuit part of the integrated circuit in the hold phase. A second storage device is charged during a first cycle to a voltage value which is inverted relative to a final voltage value of the first storage device in the hold phase. In the sample phase of the next cycle following the first cycle, the second storage device is connected to the first storage device in order to discharge the first storage device.

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