Sample and hold flip-flop for CMOS logic

Details Sample and hold flip-flop for CMOS logic Sample and hold flip-flop for CMOS logic

1995-06-05

1996-11-19

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

327200, 327211, 327218, G11C 2702

Patent

active

055766455

ABSTRACT:
A sample and hold flip-flop that includes a clock buffer circuit responsive to a first clock signal for producing a second clock signal and a third clock signal, wherein the second clock is delayed inverted replica of the first clock and wherein the third clock is a delayed inverted replica of the second clock signal; a CMOS inverter having an input and an output, wherein the output of said CMOS inverter forms the output of the sample and hold flip-flop; a first MOS transistor of a first type having a gate terminal connected to the first clock signal and a drain terminal connected to the input of the CMOS inverter; a second MOS transistor of the first type having a gate terminal connected to the second clock signal and a drain terminal being connected to the source terminal of the first MOS transistor of the first type; a first MOS transistor of a second type having a gate terminal connected to the second clock signal and a drain terminal connected to the input of the CMOS inverter; a second MOS transistor of the second type having a gate terminal connected to the third clock signal and a drain terminal connected to the source terminal of the first MOS transistor of the second type; and wherein the source terminal of the second MOS transistor of the first type and the source terminal of the second MOS transistor of the second type are connected together to form an input of the sample and hold flip-flop.

REFERENCES:
patent: 4656368 (1987-04-01), McCombs et al.
patent: 4968968 (1990-11-01), Taylor
patent: 5015971 (1991-05-01), Taylor et al.
patent: 5065057 (1991-11-01), Kawasaki
patent: 5081377 (1992-01-01), Freyman
patent: 5111072 (1992-05-01), Seidel
patent: 5130714 (1992-07-01), Taylor
patent: 5189315 (1993-02-01), Akata

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