Sample-and-hold droop compensator for high speed high resolution

Details Sample-and-hold droop compensator for high speed high resolution Sample-and-hold droop compensator for high speed high resolution

1991-04-19

1993-02-02

Pellinen, A. D.

Coded data generation or conversion

Sample and hold

341118, H03M 106

Patent

active

051841274

ABSTRACT:
A sample-and-hold droop compensation circuit including a ramp generator for producing a ramp signal synchronized with the hold timing of a sample-and-hold circuit and adjusted so as to tend to compensate the droop in the sample-and-hold output, circuitry for adding the ramp signal to the output of the sample-and-hold circuit to produce a sum signal, and a quantizer for providing a digital representation of the sum signal. The slope of the ramp signal is adjusted by a microcomputer by providing a reference input to the sample-and-hold circuit, determining the change in time of the sum signal, and adjusting the ramp signal so as to reduce the slope of the sum signal.

REFERENCES:
patent: 3982241 (1976-09-01), Lipcon
patent: 4191942 (1980-03-01), Long
patent: 4528549 (1985-07-01), Simpson
patent: 4590458 (1986-05-01), Evans et al.
patent: 4734677 (1988-03-01), Cake et al.
patent: 4947168 (1990-08-01), Myers

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