Sample and hold circuits and methods with offset error...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

Reexamination Certificate

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C327S096000

Reexamination Certificate

active

07088147

ABSTRACT:
A sample and hold circuit including a sampling capacitor for storing a sample of an input signal, an output stage for outputting the sample stored on the sampling capacitor; and input circuitry for sampling the input signal and storing the sample on the sampling capacitor. The input circuitry includes an autozeroing input buffer which selectively samples the input signal during a first operating phase and holds a sample of the input signal during a second operating phase. The autozeroing input buffer cancels any offset error. The input circuitry also includes switching circuitry for selectively coupling the sampling capacitor with an input of the sample and hold circuitry during the second operating phase and to an output of the autozeroing input buffer during the first operating phase.

REFERENCES:
patent: 4543534 (1985-09-01), Temes et al.
patent: 5376936 (1994-12-01), Kerth et al.
patent: 6124814 (2000-09-01), Lee et al.
patent: 6147522 (2000-11-01), Rhode et al.
patent: 6731155 (2004-05-01), Hakkarainen et al.
“Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: AUtozeroing, Correlated Double Sampling, and Chopper Stabilization” by Christian C. Enz & Gabor C. Temes, Proceedings of the IEEE, Nov. 1996.

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