Sample and hold circuit with improved offset compensation

Details Sample and hold circuit with improved offset compensation Sample and hold circuit with improved offset compensation

1981-10-30

1984-03-27

Zazworsky, John

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307520, 328151, 328162, 333173, G11C 2702

Patent

active

044396937

ABSTRACT:
The auto-zeroing technique of this invention comprises two steps. In the first step, the differential amplifier output and negative input are shorted together and the resulting amplifier offset output voltage is stored across an input capacitor and a feedback capacitor, the input capacitor being connected between the amplifier negative input and a voltage source to be sampled and the feedback capacitor being connected between the amplifier negative input and ground. In the second step, the direct connection between the amplifier output and negative input is removed and the feedback capacitor is reconnected between the amplifier output and negative input in a feedback loop. At this time, a voltage of the same magnitude and opposite polarity as the original amplifier offset output voltage is applied as negative feedback across the amplifier, so that the amplifier offset output voltage is precisely zeroed. In an alternative embodiment, the connection and reconnection steps are performed at a frequency f.sub.c so that the device functions as a switched capacitor integrator.

REFERENCES:
patent: 3050673 (1962-08-01), Widmer
patent: 4151429 (1979-04-01), Hupe
patent: 4163947 (1979-08-01), Weedon
patent: 4365204 (1982-12-01), Haque

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