Sample-and-hold circuit with current gain

Details Sample-and-hold circuit with current gain Sample-and-hold circuit with current gain

1978-10-23

1980-11-11

Zazworsky, John

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307253, 328151, G11C 2702, H03K 1756

Patent

active

042335280

ABSTRACT:
The subject invention is a sample-and-hold circuit that provides current gain and that is suitable for construction according to LSI (large scale integration) techniques. The circuit incorporates a bipolar transistor biased on (in the "sample" mode) to a predetermined quiescent state. A capacitor is connected across the output of the circuit (i.e. across the output of the bipolar transistor) to be charged to a certain voltage by the bipolar transistor and to store this voltage when the sample-and-hold circuit is in the "hold" mode of operation. IGFETs (insulated gate field effect transistors) are employed to bias the bipolar transistor and to switch the circuit from one mode of operation to the other.

REFERENCES:
patent: 3471719 (1969-10-01), Hughes
patent: 3638045 (1972-01-01), Hughes
patent: 3675135 (1972-07-01), Weller
patent: 3716800 (1973-02-01), Di Rocco
patent: 3764921 (1973-10-01), Huard
patent: 3959732 (1976-05-01), Schaefer

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