Sample and hold circuit including a multiplexer

Details Sample and hold circuit including a multiplexer Sample and hold circuit including a multiplexer

2002-11-14

2004-10-05

Nguyen, Matthew V. (Department: 2838)

Coded data generation or conversion

Sample and hold

C341S141000

Reexamination Certificate

active

06801146

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to switching power supplies or converters. In particular, this invention relates to a simple, robust switching power supply which is capable of providing power to a number of different regulated power sources within a given circuit.
BACKGROUND OF THE INVENTION
Switching power supplies are used to provide power in numerous products such as cell phones, camera, PDAs (Personal Digital Assistants), calculators, portable computers and similar types of electronic equipment. Such switching power supplies are quite complex and use numerous components to provide a number of precisely regulated output voltages to power the various integrated circuits and other components contained within the product being powered. Relative to the cost and the quality of the products in which they are used, such power supplies are expensive, bulky and inefficient. Efficiency is important to provide the equipment a long battery life.
FIG. 1
shows a typical prior art power supply used in portable equipment powered by a battery
10
. The signal from battery
10
is transmitted on lead
10
a
to a level translation circuit
12
, which is controlled by a control signal from analog pulse width modulated controller
11
. The control signal from analog pulse width modulator is responsive to the voltage drop across resistor
16
as detected by signals on conductive leads
17
a
and
17
b
connecting, respectively, the two terminals of resistor
16
into analog PWM controller
11
. N-channel MOS transistors
13
a
and
13
b
are connected to operate in a complementary fashion. Level translation circuit
12
provides a high level voltage to the gate of N-channel transistor
13
a
to apply a pulse from battery
10
to one input terminal of coil
15
. The other input terminal of coil
15
is connected to one terminal of resistor
16
. The other terminal of resistor
16
is connected to load capacitor
18
, which contains a charge at the voltage necessary to supply the particular circuitry being powered by this portion of the power supply. The analog PWM controller
11
measures the current through resistor
16
and controls the ON time of N-channel MOS transistor
13
a
. N-channel MOS transistor
13
b
is driven by the complement of the signal driving the gate of N-channel MOS transistor
13
a
and turns on to pull the input lead of coil
15
to ground and to shut off the current required to be supplied through resistor
16
to the power supply. Internal circuitry of analog pulse width controller
11
is shown schematically in FIG.
2
.
As shown in
FIG. 2
, current source
20
provides a charging current to capacitor
21
to generate a ramp voltage across this capacitor. This ramp voltage is provided to the positive input lead of differential amplifier
22
a
, the negative input lead of which receives the output signal from differential amplifier
22
b
. The positive input lead of amplifier
22
b
is connected to the load capacitor
18
and carries a signal representing the voltage across the load capacitor
18
. The negative input lead of differential amplifier
22
b
is connected to the node between resistors
23
a
and
23
b
making up a voltage divider (one terminal of which is connected to a reference voltage VRef and the other terminal of which is connected to the output lead of differential amplifier
22
b
). Thus when the output voltage across capacitor
18
is less than the voltage at node A between resistor
23
a
and resistor
23
b
, the output voltage from differential amplifier
22
b
goes to a low level. This low level output voltage is provided to the negative input lead of amplifier
22
a
, causing amplifier
22
a
to produce a positive output pulse. This positive output pulse is transferred to coil
15
to provide a charging current to capacitor
18
. With time, the charge on capacitor
18
increases until the voltage across capacitor
18
exceeds the voltage on node A. At this point the output voltage from differential amplifier
22
b
goes to a high level, so that the voltage at the negative input lead of differential amplifier
22
a
exceeds the voltage on the positive input lead of differential amplifier
22
a
, causing the output voltage from amplifier
22
a
to go a low level, and thus preventing further charging of capacitor
18
. The voltage across coil
15
is negative, reflecting the negative rate of change in current in response to the trailing edge of the pulse from amplifier
22
a
going from a high level to a low level. The current through coil
15
does not change instantaneously due to the magnetic field of the coil but rather gradually changes with time. This type of power supply, which is characterized by a current source driving a capacitor, is known as an analog buck converter. Each MOSFET modulation cycle is formed by the precision comparator and the error amplifier. Such a power supply is difficult to scale and integrate into an integrated circuit and is typically fabricated using dedicated analog process technologies at captive semiconductor foundries.
Accordingly, what is needed is a power supply which provides different level precision voltages and at the same time and is simple to implement with a smaller number of components than in the prior art. Such a power supply must also be relatively inexpensive, robust and reliable.
SUMMARY OF THE INVENTION
In one embodiment of the present invention a sample and hold circuit is provided which includes a first input circuit adapted to sample and hold a plurality of first voltage measurements and a second input circuit coupled to the first input circuit. The second input circuit is adapted to sample and hold a plurality of second voltage measurements corresponding to current measurements. A multiplexer is coupled to the first input circuit and the second input circuit with the multiplexer being adapted to selectively provide a multiplexer output signal corresponding to one of the first voltage measurements or the second voltage measurements.
In another embodiment of the present invention, a sample and hold circuit as described above further includes a voltage divider circuit coupled between the first input circuit and the multiplexer. The voltage divider circuit is adapted to scale the first voltage measurements.
In another embodiment of the present invention as first described above, the secnod input circuit includes a multiplexer circuit adapted to multiply the second voltage measurements.
In another embodiment of the present invention, the multiplier circuit as described immediately above comprises a switched capacitor network.
In another embodiment of the present invention, the multiplexer provides the multiplexer output signal to an analog-to-digital converter.
This invention will be more fully understood in conjunction with the drawings taken together with the following detailed description.


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Peterchev, A.V. and Sanders, S.R., “Quantization Resolution and Limit Cycling in Digitally Controlled PWM Converters,”IEEE Power Electronics Specialists Conference,2001, 7 pp.
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Xiao, J., et al., “Architecture and IC Implementation of a Digital VRM Controller,”IEEE

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