Sample-and-hold circuit for analog voltages

Details Sample-and-hold circuit for analog voltages Sample-and-hold circuit for analog voltages

1975-12-19

1977-12-13

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307353, 307358, 331 10, 331 14, 331 17, 343 5R, H03K 1726

Patent

active

040631826

ABSTRACT:
A sample-and-hold circuit has an input terminal connected to a source of analog voltages to be stored, this terminal being connected during a sampling phase via a first switch to an output terminal and to an input of a first amplifier working into a storage capacitor by way of a second switch also closed during that phase. The capacitor is tied to one of two differential inputs of a second amplifier, the other differential input being connected to the output of the first amplifier upon closure of a third switch during a holding phase in which the first and second switches are open. A fourth switch, also closed during the holding phase, establishes a feedback path from the output of the second amplifier to the input of the first amplifier whereby the two differential inputs are energized with substantially equal voltages maintaining a certain error voltage which is smoothed by a low-pass filter or integrator in the feedback path and which appears on the output terminal with a magnitude equal to that of the source voltage. The circuit may be used in a pulse radar to lock the freqency of a local oscillator onto a variable carrier frequency.

REFERENCES:
patent: 3636458 (1972-01-01), Sugiyama et al.
patent: 3686577 (1972-08-01), Fruhauf

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