Sample and hold circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

Reexamination Certificate

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Details

C327S094000

Reexamination Certificate

active

06323696

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to high speed data transmission systems. More specifically, the present invention relates to a sample and hold system for such systems.
BACKGROUND ART
Sample and hold circuits are used to convert a continuous electrical signal into a discrete-amplitude signal. Sample and hold circuits hold a fixed value for a time between each sample. The signal is held so that subsequent electronic stages can read and process each sample value.
Track and hold circuits are also used to accomplish a similar function. The distinction between a sample and hold circuit and a track and hold circuit is that the sample and hold circuit samples a signal at a specific time instead of allowing the circuit to drift with the incoming signal during periods when the signal is not held.
One potential use for a sample and hold circuit is at the front end of a satellite or radar receiver to convert an incoming continuous signal into a sequence of discrete points for subsequent digital signal processing. Usually, the signal processing function involves analog-to-digital conversion followed by digital signal processing.
Often, track and hold circuits are referred to as sample and hold circuits. However, these circuits are not true sample and hold circuits since they allow the signal to drift with the incoming signal.
One problem with currently known sample and hold circuits is that they typically cannot sample high frequency signals (up to 100 GHz) due to their slow response times.
Several known implementations of sample and hold or track and hold circuits are known. For high frequency circuits, a track and hold circuit using a diode bridge is used. The diode bridge architecture is advantageous due to its speed and simplicity. However, the circuits are commonly track and hold circuits rather than true sample and hold circuits because the output signal is not held fixed during part of the clock cycle. Thus, another disadvantage of track and hold circuits is that the correspondence between the signal and the timing sample is unspecified for about half the clock cycle. This imprecision in determining the time corresponding to a given value is a form of timing jitter. Timing jitter is disadvantageous for subsequent signal processing.
Other sample and hold circuits are transistor-based. These circuits are generally slower than the previously mentioned diode bridge circuits. Slower circuits cannot be used for high frequency applications.
Other sample and hold circuits use Josephson junctions and tunnel diodes. Such circuits are impractical to implement and are believed to not have the required speed for high frequency applications.
SUMMARY OF THE INVENTION
It is, therefore, one object of the invention to provide a true sample and hold circuit capable of performing at high frequencies.
In one aspect of the invention, a sample and hold circuit that is coupled to a control voltage source and a signal source has a sampling bridge coupled in series between a first resonant tunneling diode. The bridge comprises a plurality of diodes. The sampling bridge couples an input voltage signal that is to be sampled to a holding capacitor when the sampling bridge is forward biased. The bridge substantially decouples the input voltage signal from the holding capacitor when the sampling bridge diodes are reversed biased. The resonant tunneling diodes when reversed biased allow the bridge to be isolated from the control voltage source to allow the holding capacitor to float at the input voltage after sampling.
One advantage of the invention is that the integrated circuit area for the implementation of such a circuit is relatively small. Another advantage of the invention is that the circuit uses a relatively low amount of power and has relatively few components.
Other objects and features of the present invention will become apparent when viewed in light of the detailed description of the preferred embodiment when taken in conjunction with the attached drawings and appended claims.


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