Sample-and-hold circuit

Details Sample-and-hold circuit Sample-and-hold circuit

1992-04-22

1994-05-31

Levy, Stuart S.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307359, 328151, G11C 2702

Patent

active

053172035

ABSTRACT:
Disclosed is a sample-and-hold circuit. A plurality of input signals are applied to the capacitors through the corresponding analog switches. The capacitors are charged to the instantaneous voltages of input signals when the corresponding analog switches are conducting. An output circuit comprising a plurality of input circuit legs and an output is provided. Each input circuit leg includes series connected input transistor and switching transistor. Input circuit legs are connected in parallel. A plurality of inputs of the switching trainsistors are supplied with input switching signals to turn on the switching transistors in a systematic chosen sequence. And a plurality of inputs of the input transisntrs are connected to the capacitors to put the voltage across one of the capacitors to the output during the time when the corresponding analog switch is in the hold mode and the corresponding switch transisor is conducting.

REFERENCES:
patent: 5162670 (1992-11-01), Itakura et al.

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