Safety timer to protect a display from fault conditions

Computer graphics processing and selective visual display system – Display driving control circuitry – Physically integral with display elements

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C345S204000

Reexamination Certificate

active

06448962

ABSTRACT:

BACKGROUND
(1) Field of the Invention
The invention relates to protection of displays from potentially damaging events. More specifically, the invention relates to protection of displays from DC voltage damage caused by fault conditions.
(2) Background
Liquid crystal displays have been known generally for many years. Initially, liquid crystal displays were formed on amorphous silicon substrates. Amorphous silicon tended to be slow, relatively large, and unsuited for formation of high speed logic and other device types. Liquid crystal displays then evolved into a polysilicon style which still had inadequate speed and logic compatibility characteristics. More recently, crystalline silicon has been employed to manufacture very small liquid crystal on silicon (LCOS) displays. These displays are much faster than the displays which use polysilicon to form display devices and can permit high speed driving of the individual pixels on display. In miniature displays, the challenge is to make the displays as small as possible and to also minimize power consumption, as these displays are increasingly used in a mobile environment with limited power resources.
The use of lookup tables (LUTs) is generally understood in the art. A LUT is effectively a listing of output codes which correspond to the possible input codes. The LUT performs a mapping of the input code to the output code, though the input code and output code may have different ranges. Typically, when LUTs are used in the context of displaying graphical data, three LUTs are employed to carry output codes corresponding to each of the color components (e.g. red, green, and blue) of a pixel. The subsequent three output codes are all simultaneously driven to the display to create the image of the color specified. Using three LUTs per pixel implies non-trivial die space to form the three LUTs, as well as power consumption by all those tables. In the context of miniature displays, it is desirable to minimize both die space and power consumption.
Because driving consecutive positive frames may cause liquid crystal malfunctions, liquid crystal display pixels are invariably driven by an alternating voltage having a positive and negative swing. While this places certain powering constraints on the system, it also necessitates use of frame inversion techniques in which the frame data is inverted to be driven by a negative signal. The required data inversion increases complexity of the display controller as well as power consumption and die are required.
It is also known in the art that liquid crystal displays can be damaged if exposed to DC voltage for a significant period of time. Thus, efforts have been made to reduce the risk of such damage. However, in the case of systems where the display is remote from the display controller, improper cable connections, a crash at the controller, or even a damaged cable can cause large and damaging voltages to be driven to a liquid crystal display. The problem arises how to protect the display from damages as a result of likely faults. Solutions to this problem are largely absent in the existing art.
BRIEF SUMMARY OF THE INVENTION
An apparatus and method for protecting a display from fault conditions is disclosed. An oscillator independent of a display clock of a display to be protected is formed on a substrate with the display. The oscillator generates a periodic signal which is used to define a period during which a register collects indicators of normal system operation. Combinational logic is used to determine if the set of indicators collected matches the set of indicators expected during the time period. If the set matches, operation is deemed normal and no action is taken. If an indicator is missing, the combinational logic generates a signal that causes the display to be driven into a safe state until such time as all indicators are again collected within the defined time period.


REFERENCES:
patent: 4862149 (1989-08-01), Boyer
patent: 5512917 (1996-04-01), Scott
patent: 5563624 (1996-10-01), Imamura
patent: 5703629 (1997-12-01), Mermelstein et al.
patent: 3807020 (1989-09-01), None
patent: 19832075 (1999-09-01), None
patent: 10123996 (1998-05-01), None
patent: WO 96/37876 (1996-11-01), None
PCT International Search Report, date mailed Jul. 27, 2000, PCT/US00/13097, 7 pages.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Safety timer to protect a display from fault conditions does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Safety timer to protect a display from fault conditions, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Safety timer to protect a display from fault conditions will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2851093

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.