Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2005-06-14
2005-06-14
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S242000, C438S244000, C438S245000, C438S259000, C438S246000, C257S330000, C257S331000
Reexamination Certificate
active
06905944
ABSTRACT:
A method for fabricating a deep trench etched into a semiconductor substrate is provided by the present invention. The trench is divided into an upper portion and a lower portion and the method allows for the lower portion to be processed differently from the upper portion. After the trench is etched into the semiconductor substrate, a nitride layer is formed over a sidewall of the trench. A layer of oxide is then formed over the nitride layer. A filler material is then deposited and recessed to cover the oxide layer in the lower portion of the trench, followed by the removal of the oxide layer from the upper portion of the trench above the filler material. Once the oxide layer is removed from the upper portion of the trench, the filler material can also be removed, while allowing the oxide layer and the nitride layer to remain in the lower portion of the trench. Silicon is selectively deposited on the exposed nitride layer in the upper portion of the trench. The oxide layer and the nitride layer is then removed from the lower portion. Finally, the lower portion of the trench is processed selectively to nitride, e.g. by one or more capacitor forming processes, and then the upper portion of the trench is processed.
REFERENCES:
patent: 6153474 (2000-11-01), Ho et al.
patent: 6437401 (2002-08-01), Mandelman et al.
Chudzik Michael Patrick
McStay Irene
Tews Helmut Horst
Wrschka Porshia Shane
Berry Renee R.
Capella Steven
Infineon - Technologies AG
Neff Daryl K.
Nelms David
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