Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2006-10-03
2006-10-03
Lee, Hsien-Ming (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S591000, C438S624000, C438S663000
Reexamination Certificate
active
07115479
ABSTRACT:
Numerous embodiments of a method and apparatus for a sacrificial annealing layer are disclosed. In one embodiment, a method of forming a sacrificial annealing layer for a semiconductor device comprises forming one or more sacrificial layers on at least a portion of the top surface of a semiconductor device, annealing at least a portion of the device, and removing a substantial portion of the one or more sacrificial layers, where the removing results in no substantial physical alterations to the device.
REFERENCES:
patent: 5268330 (1993-12-01), Givens et al.
patent: 6002150 (1999-12-01), Gardner et al.
patent: 6156654 (2000-12-01), Ho et al.
patent: 6194748 (2001-02-01), Yu
patent: 6238967 (2001-05-01), Shiho et al.
patent: 6287927 (2001-09-01), Burke et al.
patent: 6291278 (2001-09-01), Xiang et al.
patent: 6303962 (2001-10-01), Gardner et al.
patent: 6338993 (2002-01-01), Lien
patent: 6368915 (2002-04-01), Montree et al.
patent: 6495437 (2002-12-01), Yu
patent: 6498112 (2002-12-01), Martin et al.
patent: 6518618 (2003-02-01), Fazio et al.
patent: 6524920 (2003-02-01), Yu
patent: 6528888 (2003-03-01), Cho et al.
patent: 6531192 (2003-03-01), Akram
patent: 6534837 (2003-03-01), Bai et al.
patent: 6555431 (2003-04-01), Xing et al.
patent: 6577011 (2003-06-01), Buchwalter et al.
patent: 6596639 (2003-07-01), Easter et al.
patent: 6617209 (2003-09-01), Chau et al.
patent: 6624489 (2003-09-01), Chong et al.
patent: 6638851 (2003-10-01), Cowley et al.
patent: 6642107 (2003-11-01), Seo et al.
patent: 6649453 (2003-11-01), Chen et al.
patent: 6717204 (2004-04-01), Furuhata et al.
patent: 6734094 (2004-05-01), Kloster et al.
patent: 6856630 (2005-02-01), Tanaka
patent: 2003/0151098 (2003-08-01), Nishida et al.
Brask Justin K.
Liu Mark Y.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Lee Hsien-Ming
LandOfFree
Sacrificial annealing layer for a semiconductor device and a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Sacrificial annealing layer for a semiconductor device and a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Sacrificial annealing layer for a semiconductor device and a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3616776