Ruthenium silicide wet etch

Details Ruthenium silicide wet etch Ruthenium silicide wet etch

2001-03-05

2002-12-24

Utech, Benjamin L. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Liquid phase etching

C438S755000, C252S079100, C252S079200

Reexamination Certificate

active

06498110

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to silicon integrated circuit processing and, more particularly, to a process for selectively removing ruthenium silicide from a semiconductor substrate.
2. Description of the Related Art
Semiconductor devices are typically made up of varying levels of components, each of which are formed from different materials. During the process of fabricating a semiconductor device, the device layers are repeatedly subjected to high temperature processes that can result in diffusion of species between layers. Diffusion of species of atoms or molecules, such as oxygen, for example, can result in degraded performance of different components of the semiconductor device. This problem occurs in a number of different semiconductor devices such as interconnects or capacitors.
A capacitor structure within an integrated circuit typically comprises an insulating dielectric layer sandwiched between a lower and upper conducting electrode. This provides the capacitor structure with a desired capacitance C, that varies proportionally with the dielectric constant, k, of the dielectric layer and the area, A, of the electrodes. However, due to the limitations of known manufacturing methods, the typical dielectric layer often suffers from a substantially large concentration of oxygen vacancy defects. In particular, an oxygen vacancy exists whenever the crystal structure of an oxide dielectric is missing an oxygen atom. Unfortunately, the presence of oxygen vacancies within the dielectric causes the dielectric layer to have a decreased dielectric constant as well as a decreased electrical resistance. Thus, a capacitor structure formed of such a dielectric layer usually provides a decreased capacitance, thereby reducing the charge deposited on the electrodes of the capacitor structure in response to a specific voltage differential applied across the electrodes.
Furthermore, the problems associated with oxygen vacancies within dielectric materials are becoming more apparent as integrated circuits are formed with increasingly smaller circuit elements. For example, high density Dynamic Random Access Memory (DRAM) devices requiring a large number of capacitor structures demand the electrodes of each capacitor structure to have a relatively small area. Thus, in order to provide a sufficient capacitance in response to the reduced area, A, of the electrodes, dielectric materials having a relatively large dielectric constant, k, otherwise known as high-k dielectric materials, are required. However, known high-k dielectric materials, such as tantalum pentoxide (Ta
2
O
5
), barium strontium titanate (BST), barium titanate (BT) lead zirconium titanate (PZT), and strontium bismuth tantalate (SBT), require the presence of oxygen atoms throughout their crystal structures. Furthermore, the dielectric constant and the electrical resistance of these high-k materials are especially sensitive to the presence of oxygen vacancies. Thus, these capacitor structures are more likely to be formed with an insufficient capacitance for developing a detectable charge as well as an insufficient resistance for maintaining the detectable charge.
To address the problem of oxygen vacancies in dielectric materials, manufacturers often subject DRAM integrated circuits to re-oxidation anneals. For example, DRAM integrated circuits are usually exposed to an annealing process which heats the integrated circuit in an oxidizing environment subsequent to the deposition of the dielectric material and prior to the deposition of the upper electrode so as to source oxygen atoms to the exposed dielectric material to thereby reduce the concentration of oxygen deficiencies. Disadvantageously, however, during the annealing operation the oxygen is known to diffuse through the dielectric layer and seep into the underlying bottom electrode, thus adversely affecting the electrical properties of the electrode.
In particular, the bottom electrode is typically formed on a silicon based substrate surface and the silicon is known to migrate upwardly from the substrate surface into the bottom electrode. During the annealing operation, silicon that has diffused upwardly into the bottom electrode can react with the oxygen to form silicon dioxide (SiO
2
). The formation of silicon dioxide in the bottom electrode is undesirable as it has shown to result in open contacts. This problem is especially prevalent in capacitors having bottom electrodes made of platinum, ruthenium oxide, or other metals that are particularly susceptible to silicon permeation.
To address this problem, a barrier layer can be interposed between the bottom electrode and the underlying silicon substrate surface to inhibit silicon from diffusing upwardly into the bottom electrode. In fact, one such method is disclosed in U.S. patent application Ser. No. 09/141,240 assigned to Micron Technology which teaches using a ruthenium silicide (RuSi
x
) liner as a silicon diffusion barrier in Metal-Insulator-Metal (MIM) capacitor modules. As described in the above mentioned pending U.S. patent application, ruthenium silicide (RuSi
x
) is preferably deposited onto the silicon substrate surface using a chemical vapor deposition (CVD) method that is well known in the art. However, the CVD process is known to deposit RuSix on the edges and backside of the wafer as well as any other unmasked surfaces such as clamping tools or other equipment used during deposition. As a consequence, the excessive RuSi
x
deposits have to be removed from the substrate surface prior to completion of wafer processing.
Although a number of etchants have been developed for removing ruthenium metal, there is presently no known chemistry that can effectively remove ruthenium silicide in bulk. Since the use of ruthenium silicide as a barrier liner is a relatively novel idea that shows potential for a wide range of applications in semiconductor fabrication, it can be appreciated that an appropriate etchant for removing ruthenium silicide is highly desired. Hence from the foregoing, it will be appreciated that there is a need for an etchant that can effectively remove ruthenium silicide. To this end, this is a particular need for an etching process that is simple, cost effective, and can selectively remove ruthenium silicide in bulk from a substrate surface.
SUMMARY OF THE INVENTION
The aforementioned needs are satisfied by the present invention which teaches a method of selectively removing ruthenium silicide (RuSi
x
) from a surface. In one aspect, the present invention comprises a method of using chlorine and fluorine containing chemicals to remove RuSi
x
from a surface. In particular, the method comprises exposing the surface containing ruthenium silicide to a solution containing chlorine and fluorine containing chemicals such that the solution reacts with the ruthenium silicide film to form water-soluble reaction products. Furthermore, subsequent to reacting ruthenium silicide with said solution, the method comprises rinsing the surface to further dissolve and remove reactants and products formed as a result of the interaction between RuSi
x
and the etching solution.
In one embodiment, the surface containing ruthenium silicide is exposed to an aqueous solution containing chlorine- and fluorine-containing chemicals. Furthermore, the same aqueous solution is used to dissolve and remove the reaction products so that the formation and dissolution of soluble products can be performed in the same reaction tank using substantially the same solution. However, in other embodiments, chlorine- and fluorine-containing chemicals may be obtained from a gaseous source and a separate aqueous solution may be used to dissolve and flush the reaction products remaining on the surface. For instance, chlorine gas can be mixed with HF solution and water to form the etchant solution. Alternatively, the etchant solution can be prepared by bubbling Cl
2
and HF gas into water.
In another aspect, the present invention comprises a hypochlorite salt based solution that can selectively et

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