Run-time behavior preserving partial redundancy elimination

Details Run-time behavior preserving partial redundancy elimination Run-time behavior preserving partial redundancy elimination

2007-05-01

2007-05-01

Zhen, Wei (Department: 2191)

Data processing: software development, installation, and managem

Software program development tool

Translation of code

Reexamination Certificate

active

10331348

ABSTRACT:
An arrangement is provided for eliminating partial redundancy. Original code is processed to perform run-time behavior preserving redundancy elimination. Partial redundancy is removed in a manner so that the run-time behavior of the original code is preserved.

REFERENCES:
patent: 5790867 (1998-08-01), Schmidt et al.
patent: 6044221 (2000-03-01), Gupta et al.
patent: 6857060 (2005-02-01), Elias et al.
patent: 6993754 (2006-01-01), Freudenberger et al.
Thomas VanDrunen et al., “Anticipation-based partial redundancy elimination for static single assignment form”, Sep. 23, 2002, Software—Practice and Experience, pp. 1-10.
By Bodik, Rastislav , “Path-Sensitive, Value-Flow Optimizations of Programs”, University of Pittsburg, 1999, pp. 78-97, “http://wwwlib.umi.com/dissertations/order—pickup/prod/de7dbab5b24723f8882ceb8066e778a/7460047/7136749/9957708.PDF”.
Scholz et al., “Partial Redundancy Elimination with Prediction Techniques” Internet Article, ′Online′, May 29, 2003, pp. 1-9, XP 002297563, retrieved from: http://www.cs.uvic.ca/(nigelh/Publications/EuroPar03.pdf> on Sep. 22, 2004.
Schlansker, et al., “Achieving High Levels of Instruction-Level Parallelism with Reduced Hardware Complexity,” HP Laboratories Technical Report Feb. 1997 Hewlett Packet Lab Technical Publ. Dept., Palo Alto, CA USA, No. 96-120, Feb. 1997, pp. 1-85, XP002297565, p. 41, lines 3-9, and p. 26, line 12-p. 27, line 15.
Dulong, et al., “An Overview of the Intel IA-64 Compiler,” Intel Technology Journal, Internet Article, Nov. 22, 1999, pp. 1-15, XP002297566, http://developer.intel.com/technology/itj/q41999/pdf/compiler.pdf, retrieved on Sep. 22, 2004, p. 9, line 24-p. 11, line 14 and p. 11, line 23-p. 12, line 42.
Muchnick S., “Advanced Compiler Design and Implementation,” 1997, Morgan Kaufman Publishers, San Francisco, CA, ISBN: 1-55860-320-4, section 12.4.2, p. 414, lines 15-17.
PCT International Search Report performed by European Patent Office, mailed Nov. 4, 2004.
Thomas VanDrunen, “A Robust Algorithm for Partial Redundancy Elimination in Static Single Assignment Form”, Computer Science, Purdue University, MSPLS 2002, vandrutj@cs.purdue.edu.
Thomas VanDrunen, “Uniting Global Value Numbering and Partial Redundancy Elimination”, Computer Science, Purdue University, Summer 2002.

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