Run length limited encoding/decoding with robust resync

Details Run length limited encoding/decoding with robust resync Run length limited encoding/decoding with robust resync

1998-02-17

1999-10-19

Young, Brian

Coded data generation or conversion

Digital code to digital code converters

To or from run length limited codes

H03M 746

Patent

active

059696494

ABSTRACT:
Disclosed are robust Resync patterns for insertion into a run length limited (d,k) encoded channel bit stream, which Resync pattern may be recovered from the RLL (d,k) encoded bit stream without being confused with data. The Resync pattern includes at least one string of consecutive "0"s which exceeds the RLL (k) constraint, and is inserted into the channel bit stream RLL data codewords. The RLL code excludes certain patterns representing a bit shift from the Resync pattern of one or both "1" bits adjacent to the string of "0" bits, shifted to shorten the Resync pattern to within the (k) constraint. Additionally, the Resync pattern may have two different aspects, one of which is the string of "0"s violating the constraints of the RLL code, and another which is specifically excluded from the RLL code, such as an excluded concatenated sequence of a VFO bit pattern of predetermined length or greater.

REFERENCES:
patent: 4553237 (1985-11-01), Nakamura
patent: 4899340 (1990-02-01), Lubarsky
patent: 5333126 (1994-07-01), Fukuda et al.
patent: 5451943 (1995-09-01), Satomura
patent: 5682153 (1997-10-01), Ishiguro

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