Rules and apparatus for an intermediate code memory that buffers

Details Rules and apparatus for an intermediate code memory that buffers Rules and apparatus for an intermediate code memory that buffers

1988-10-17

1990-04-03

Eng, David Y.

Boots, shoes, and leggings

3642318, 3642617, 3642631, 3642443, G06F 938, G06F 940, G06F 942

Patent

active

049145843

ABSTRACT:
An intermediate code memory for taking instructions from main memory and supplying them inline to a processing element is disclosed. Inputting instructions into the intermediate code memory from main memory is done using a DMA channel and may be done simultaneously with outputting instructions to the processing element. Outputting can be done from any location that is outside a dynamic window, whose position and size depend on the area in the code memory to which the code is currently being input. In addition, the code memory contains a LIFO stack and executes all subprogram call and return instructions so that the instructions presented to the processing element are inline. Normally, the instructions are output sequentially from the code memory, however, subprogram calls and returns, certain unconditional branch instructions executed by the intermediate code memory, and addresses passed from the processing element may change the instruction sequence.

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Harold Stone, High-Performance Computer Architecture, Addison-Wesley, 1987.

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