RS flip-flop with enable inputs

Details RS flip-flop with enable inputs RS flip-flop with enable inputs

1998-09-25

1999-11-30

Lam, Tuan T.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

327225, H03K 3356

Patent

active

059949368

ABSTRACT:
An RS flip-flop has an inverter, connected to an input terminal of the RS flip-flop, a NOR gate having an Enable-Set input, a NAND gate having an Enable-Reset input, and a first and a second transistor connected to the inverter. The outputs of the NOR and NAND gates are connected, via the gate paths of the first and second transistors, to the gate electrode of a third and a fourth transistor, respectively. The third and the fourth transistor are connected in series and form a holding element, whose common connection point is connected to the output of the inverter and to the output terminal of the flip-flop.

REFERENCES:
patent: 3982985 (1975-07-01), Kawagoe
patent: 4342927 (1982-08-01), Hull
patent: 5191245 (1993-03-01), Kang
Patent Abstracts of Japan No. 56-73921 A (Aoki), dated Jun. 19, 1981.
Patent Abstracts of Japan No. 60-70817 A (Uchida), dated Apr. 22, 1985.

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