RS flip-flop

Details RS flip-flop RS flip-flop

1992-04-01

1993-05-04

Ng, Jin F.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072721, 307279, H03K 326, H03K 329

Patent

active

052084876

ABSTRACT:
A logic circuit outputs a logic signal in response to set inputs and a reset input. This logic signal is applied to output terminals through a latch circuit. When outputs Q and Q of the RS flip-flop maintain a previous state, the latch circuit is activated by a control signal applied from an OR gate to hold a previous logic signal received from the logic circuit. Thus, the logic circuit and latch circuit are arranged on a signal path from input terminals to output terminals. These logic circuit and latch circuit do not include a series connection of transistors and, therefore, is operable at high speed in response to the inputs. Consequently, the outputs Q and Q have excellent response characteristics relative to the set and reset inputs, to enable a high-speed operation.

REFERENCES:
patent: 4581548 (1986-04-01), Young
patent: 4651029 (1987-03-01), Oritani

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